This is Info file ./gpc.info, produced by Makeinfo version 1.67 from
the input file ./gpc.texi.

   This file documents the use and the internals of the GNU Pascal
compiler.

   Copyright (C) 1988, 1996 Free Software Foundation, Inc.

   Permission is granted to make and distribute verbatim copies of this
manual provided the copyright notice and this permission notice are
preserved on all copies.

   Permission is granted to copy and distribute modified versions of
this manual under the conditions for verbatim copying, provided also
that the sections entitled "GNU General Public License," "Funding for
Free Software," and "Protect Your Freedom--Fight `Look And Feel'" are
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notice identical to this one.

   Permission is granted to copy and distribute translations of this
manual into another language, under the above conditions for modified
versions, except that the sections entitled "GNU General Public
License," "Funding for Free Software," and "Protect Your Freedom--Fight
`Look And Feel'", and this permission notice, may be included in
translations approved by the Free Software Foundation instead of in the
original English.


File: gpc.info,  Node: SPARC Options,  Next: Convex Options,  Prev: VAX Options,  Up: Submodel Options

SPARC Options
-------------

   These `-m' switches are supported on the SPARC:

`-mno-app-regs'
`-mapp-regs'
     Specify `-mapp-regs' to generate output using the global registers
     2 through 4, which the SPARC SVR4 ABI reserves for applications.
     This is the default.

     To be fully SVR4 ABI compliant at the cost of some performance
     loss, specify `-mno-app-regs'.  You should compile libraries and
     system software with this option.

`-mfpu'
`-mhard-float'
     Generate output containing floating point instructions.  This is
     the default.

`-mno-fpu'
`-msoft-float'
     Generate output containing library calls for floating point.
     *Warning:* the requisite libraries are not available for all SPARC
     targets.  Normally the facilities of the machine's usual C
     compiler are used, but this cannot be done directly in
     cross-compilation.  You must make your own arrangements to provide
     suitable library functions for cross-compilation.  The embedded
     targets `sparc-*-aout' and `sparclite-*-*' do provide software
     floating point support.

     `-msoft-float' changes the calling convention in the output file;
     therefore, it is only useful if you compile *all* of a program with
     this option.  In particular, you need to compile `libgcc.a', the
     library that comes with GNU Pascal, with `-msoft-float' in order
     for this to work.

`-mhard-quad-float'
     Generate output containing quad-word (long double) floating point
     instructions.

`-msoft-quad-float'
     Generate output containing library calls for quad-word (long
     double) floating point instructions.  The functions called are
     those specified in the SPARC ABI.  This is the default.

     As of this writing, there are no sparc implementations that have
     hardware support for the quad-word floating point instructions.
     They all invoke a trap handler for one of these instructions, and
     then the trap handler emulates the effect of the instruction.
     Because of the trap handler overhead, this is much slower than
     calling the ABI library routines.  Thus the `-msoft-quad-float'
     option is the default.

`-mno-epilogue'
`-mepilogue'
     With `-mepilogue' (the default), the compiler always emits code for
     function exit at the end of each function.  Any function exit in
     the middle of the function (such as a return statement in C) will
     generate a jump to the exit code at the end of the function.

     With `-mno-epilogue', the compiler tries to emit exit code inline
     at every function exit.

`-mno-flat'
`-mflat'
     With `-mflat', the compiler does not generate save/restore
     instructions and will use a "flat" or single register window
     calling convention.  This model uses %i7 as the frame pointer and
     is compatible with the normal register window model.  Code from
     either may be intermixed although debugger support is still
     incomplete.  The local registers and the input registers (0-5) are
     still treated as "call saved" registers and will be saved on the
     stack as necessary.

     With `-mno-flat' (the default), the compiler emits save/restore
     instructions (except for leaf functions) and is the normal mode of
     operation.

`-mno-unaligned-doubles'
`-munaligned-doubles'
     Assume that doubles have 8 byte alignment.  This is the default.

     With `-munaligned-doubles', GNU Pascal assumes that doubles have 8
     byte alignment only if they are contained in another type, or if
     they have an absolute address.  Otherwise, it assumes they have 4
     byte alignment.  Specifying this option avoids some rare
     compatibility problems with code generated by other compilers.  It
     is not the default because it results in a performance loss,
     especially for floating point code.

`-mv8'
`-msparclite'
     These two options select variations on the SPARC architecture.

     By default (unless specifically configured for the Fujitsu
     SPARClite), GPC generates code for the v7 variant of the SPARC
     architecture.

     `-mv8' will give you SPARC v8 code.  The only difference from v7
     code is that the compiler emits the integer multiply and integer
     divide instructions which exist in SPARC v8 but not in SPARC v7.

     `-msparclite' will give you SPARClite code.  This adds the integer
     multiply, integer divide step and scan (`ffs') instructions which
     exist in SPARClite but not in SPARC v7.

`-mcypress'
`-msupersparc'
     These two options select the processor for which the code is
     optimised.

     With `-mcypress' (the default), the compiler optimizes code for the
     Cypress CY7C602 chip, as used in the SparcStation/SparcServer 3xx
     series.  This is also appropriate for the older SparcStation 1, 2,
     IPX etc.

     With `-msupersparc' the compiler optimizes code for the SuperSparc
     cpu, as used in the SparcStation 10, 1000 and 2000 series. This
     flag also enables use of the full SPARC v8 instruction set.

   In a future version of GPC, these options will very likely be
renamed to `-mcpu=cypress' and `-mcpu=supersparc'.

   These `-m' switches are supported in addition to the above on SPARC
V9 processors:

`-mmedlow'
     Generate code for the Medium/Low code model: assume a 32 bit
     address space.  Programs are statically linked, PIC is not
     supported.  Pointers are still 64 bits.

     It is very likely that a future version of GPC will rename this
     option.

`-mmedany'
     Generate code for the Medium/Anywhere code model: assume a 32 bit
     text segment starting at offset 0, and a 32 bit data segment
     starting anywhere (determined at link time).  Programs are
     statically linked, PIC is not supported.  Pointers are still 64
     bits.

     It is very likely that a future version of GPC will rename this
     option.

`-mint64'
     Types long and int are 64 bits.

`-mlong32'
     Types long and int are 32 bits.

`-mlong64'
`-mint32'
     Type long is 64 bits, and type int is 32 bits.

`-mstack-bias'
`-mno-stack-bias'
     With `-mstack-bias', GNU Pascal assumes that the stack pointer, and
     frame pointer if present, are offset by -2047 which must be added
     back when making stack frame references.  Otherwise, assume no
     such offset is present.


File: gpc.info,  Node: Convex Options,  Next: AMD29K Options,  Prev: SPARC Options,  Up: Submodel Options

Convex Options
--------------

   These `-m' options are defined for Convex:

`-mc1'
     Generate output for C1.  The code will run on any Convex machine.
     The preprocessor symbol `__convex__c1__' is defined.

`-mc2'
     Generate output for C2.  Uses instructions not available on C1.
     Scheduling and other optimizations are chosen for max performance
     on C2.  The preprocessor symbol `__convex_c2__' is defined.

`-mc32'
     Generate output for C32xx.  Uses instructions not available on C1.
     Scheduling and other optimizations are chosen for max performance
     on C32.  The preprocessor symbol `__convex_c32__' is defined.

`-mc34'
     Generate output for C34xx.  Uses instructions not available on C1.
     Scheduling and other optimizations are chosen for max performance
     on C34.  The preprocessor symbol `__convex_c34__' is defined.

`-mc38'
     Generate output for C38xx.  Uses instructions not available on C1.
     Scheduling and other optimizations are chosen for max performance
     on C38.  The preprocessor symbol `__convex_c38__' is defined.

`-margcount'
     Generate code which puts an argument count in the word preceding
     each argument list.  This is compatible with regular CC, and a few
     programs may need the argument count word.  GDB and other
     source-level debuggers do not need it; this info is in the symbol
     table.

`-mnoargcount'
     Omit the argument count word.  This is the default.

`-mvolatile-cache'
     Allow volatile references to be cached.  This is the default.

`-mvolatile-nocache'
     Volatile references bypass the data cache, going all the way to
     memory.  This is only needed for multi-processor code that does
     not use standard synchronization instructions.  Making
     non-volatile references to volatile locations will not necessarily
     work.

`-mlong32'
     Type long is 32 bits, the same as type int.  This is the default.

`-mlong64'
     Type long is 64 bits, the same as type long long.  This option is
     useless, because no library support exists for it.


File: gpc.info,  Node: AMD29K Options,  Next: ARM Options,  Prev: Convex Options,  Up: Submodel Options

AMD29K Options
--------------

   These `-m' options are defined for the AMD Am29000:

`-mdw'
     Generate code that assumes the `DW' bit is set, i.e., that byte and
     halfword operations are directly supported by the hardware.  This
     is the default.

`-mndw'
     Generate code that assumes the `DW' bit is not set.

`-mbw'
     Generate code that assumes the system supports byte and halfword
     write operations.  This is the default.

`-mnbw'
     Generate code that assumes the systems does not support byte and
     halfword write operations.  `-mnbw' implies `-mndw'.

`-msmall'
     Use a small memory model that assumes that all function addresses
     are either within a single 256 KB segment or at an absolute
     address of less than 256k.  This allows the `call' instruction to
     be used instead of a `const', `consth', `calli' sequence.

`-mnormal'
     Use the normal memory model: Generate `call' instructions only when
     calling functions in the same file and `calli' instructions
     otherwise.  This works if each file occupies less than 256 KB but
     allows the entire executable to be larger than 256 KB.  This is
     the default.

`-mlarge'
     Always use `calli' instructions.  Specify this option if you expect
     a single file to compile into more than 256 KB of code.

`-m29050'
     Generate code for the Am29050.

`-m29000'
     Generate code for the Am29000.  This is the default.

`-mkernel-registers'
     Generate references to registers `gr64-gr95' instead of to
     registers `gr96-gr127'.  This option can be used when compiling
     kernel code that wants a set of global registers disjoint from
     that used by user-mode code.

     Note that when this option is used, register names in `-f' flags
     must use the normal, user-mode, names.

`-muser-registers'
     Use the normal set of global registers, `gr96-gr127'.  This is the
     default.

`-mstack-check'
`-mno-stack-check'
     Insert (or do not insert) a call to `__msp_check' after each stack
     adjustment.  This is often used for kernel code.

`-mstorem-bug'
`-mno-storem-bug'
     `-mstorem-bug' handles 29k processors which cannot handle the
     separation of a mtsrim insn and a storem instruction (most 29000
     chips to date, but not the 29050).

`-mno-reuse-arg-regs'
`-mreuse-arg-regs'
     `-mno-reuse-arg-regs' tells the compiler to only use incoming
     argument registers for copying out arguments.  This helps detect
     calling a function with fewer arguments than it was declared with.

`-msoft-float'
     Generate output containing library calls for floating point.
     *Warning:* the requisite libraries are not part of GNU Pascal.
     Normally the facilities of the machine's usual C compiler are
     used, but this can't be done directly in cross-compilation.  You
     must make your own arrangements to provide suitable library
     functions for cross-compilation.


File: gpc.info,  Node: ARM Options,  Next: M88K Options,  Prev: AMD29K Options,  Up: Submodel Options

ARM Options
-----------

   These `-m' options are defined for Advanced RISC Machines (ARM)
architectures:

`-m2'
`-m3'
     These options are identical.  Generate code for the ARM2 and ARM3
     processors.  This option is the default.  You should also use this
     option to generate code for ARM6 processors that are running with a
     26-bit program counter.

`-m6'
     Generate code for the ARM6 processor when running with a 32-bit
     program counter.

`-mapcs'
     Generate a stack frame that is compliant with the ARM Procedure
     Call Standard for all functions, even if this is not strictly
     necessary for correct execution of the code.

`-mbsd'
     This option only applies to RISC iX.  Emulate the native BSD-mode
     compiler.  This is the default if `-ansi' is not specified.

`-mxopen'
     This option only applies to RISC iX.  Emulate the native
     X/Open-mode compiler.

`-mno-symrename'
     This option only applies to RISC iX.  Do not run the assembler
     post-processor, `symrename', after code has been assembled.
     Normally it is necessary to modify some of the standard symbols in
     preparation for linking with the RISC iX C library; this option
     suppresses this pass.  The post-processor is never run when the
     compiler is built for cross-compilation.


File: gpc.info,  Node: M88K Options,  Next: RS/6000 and PowerPC Options,  Prev: ARM Options,  Up: Submodel Options

M88K Options
------------

   These `-m' options are defined for Motorola 88k architectures:

`-m88000'
     Generate code that works well on both the m88100 and the m88110.

`-m88100'
     Generate code that works best for the m88100, but that also runs
     on the m88110.

`-m88110'
     Generate code that works best for the m88110, and may not run on
     the m88100.

`-mbig-pic'
     Obsolete option to be removed from the next revision.  Use `-fPIC'.

`-midentify-revision'
     Include an `ident' directive in the assembler output recording the
     source file name, compiler name and version, timestamp, and
     compilation flags used.

`-mno-underscores'
     In assembler output, emit symbol names without adding an underscore
     character at the beginning of each name.  The default is to use an
     underscore as prefix on each name.

`-mocs-debug-info'
`-mno-ocs-debug-info'
     Include (or omit) additional debugging information (about
     registers used in each stack frame) as specified in the 88open
     Object Compatibility Standard, "OCS".  This extra information
     allows debugging of code that has had the frame pointer
     eliminated.  The default for DG/UX, SVr4, and Delta 88 SVr3.2 is
     to include this information; other 88k configurations omit this
     information by default.

`-mocs-frame-position'
     When emitting COFF debugging information for automatic variables
     and parameters stored on the stack, use the offset from the
     canonical frame address, which is the stack pointer (register 31)
     on entry to the function.  The DG/UX, SVr4, Delta88 SVr3.2, and
     BCS configurations use `-mocs-frame-position'; other 88k
     configurations have the default `-mno-ocs-frame-position'.

`-mno-ocs-frame-position'
     When emitting COFF debugging information for automatic variables
     and parameters stored on the stack, use the offset from the frame
     pointer register (register 30).  When this option is in effect,
     the frame pointer is not eliminated when debugging information is
     selected by the -g switch.

`-moptimize-arg-area'
`-mno-optimize-arg-area'
     Control how function arguments are stored in stack frames.
     `-moptimize-arg-area' saves space by optimizing them, but this
     conflicts with the 88open specifications.  The opposite
     alternative, `-mno-optimize-arg-area', agrees with 88open
     standards.  By default GNU Pascal does not optimize the argument
     area.

`-mshort-data-NUM'
     Generate smaller data references by making them relative to `r0',
     which allows loading a value using a single instruction (rather
     than the usual two).  You control which data references are
     affected by specifying NUM with this option.  For example, if you
     specify `-mshort-data-512', then the data references affected are
     those involving displacements of less than 512 bytes.
     `-mshort-data-NUM' is not effective for NUM greater than 64k.

`-mserialize-volatile'
`-mno-serialize-volatile'
     Do, or don't, generate code to guarantee sequential consistency of
     volatile memory references.  By default, consistency is guaranteed.

     The order of memory references made by the MC88110 processor does
     not always match the order of the instructions requesting those
     references.  In particular, a load instruction may execute before
     a preceding store instruction.  Such reordering violates
     sequential consistency of volatile memory references, when there
     are multiple processors.   When consistency must be guaranteed,
     GNU Pascal generates special instructions, as needed, to force
     execution in the proper order.

     The MC88100 processor does not reorder memory references and so
     always provides sequential consistency.  However, by default, GNU
     C generates the special instructions to guarantee consistency even
     when you use `-m88100', so that the code may be run on an MC88110
     processor.  If you intend to run your code only on the MC88100
     processor, you may use `-mno-serialize-volatile'.

     The extra code generated to guarantee consistency may affect the
     performance of your application.  If you know that you can safely
     forgo this guarantee, you may use `-mno-serialize-volatile'.

`-msvr4'
`-msvr3'
     Turn on (`-msvr4') or off (`-msvr3') compiler extensions related
     to System V release 4 (SVr4).  This controls the following:

       1. Which variant of the assembler syntax to emit.

       2. `-msvr4' makes the Pascal preprocessor recognize `#pragma
          weak' that is used on System V release 4.

       3. `-msvr4' makes GNU Pascal issue additional declaration
          directives used in SVr4.

     `-msvr4' is the default for the m88k-motorola-sysv4 and
     m88k-dg-dgux m88k configurations. `-msvr3' is the default for all
     other m88k configurations.

`-mversion-03.00'
     This option is obsolete, and is ignored.

`-mno-check-zero-division'
`-mcheck-zero-division'
     Do, or don't, generate code to guarantee that integer division by
     zero will be detected.  By default, detection is guaranteed.

     Some models of the MC88100 processor fail to trap upon integer
     division by zero under certain conditions.  By default, when
     compiling code that might be run on such a processor, GNU C
     generates code that explicitly checks for zero-valued divisors and
     traps with exception number 503 when one is detected.  Use of
     mno-check-zero-division suppresses such checking for code
     generated to run on an MC88100 processor.

     GNU Pascal assumes that the MC88110 processor correctly detects all
     instances of integer division by zero.  When `-m88110' is
     specified, both `-mcheck-zero-division' and
     `-mno-check-zero-division' are ignored, and no explicit checks for
     zero-valued divisors are generated.

`-muse-div-instruction'
     Use the div instruction for signed integer division on the MC88100
     processor.  By default, the div instruction is not used.

     On the MC88100 processor the signed integer division instruction
     div) traps to the operating system on a negative operand.  The
     operating system transparently completes the operation, but at a
     large cost in execution time.  By default, when compiling code
     that might be run on an MC88100 processor, GNU Pascal emulates
     signed integer division using the unsigned integer division
     instruction divu), thereby avoiding the large penalty of a trap to
     the operating system.  Such emulation has its own, smaller,
     execution cost in both time and space.  To the extent that your
     code's important signed integer division operations are performed
     on two nonnegative operands, it may be desirable to use the div
     instruction directly.

     On the MC88110 processor the div instruction (also known as the
     divs instruction) processes negative operands without trapping to
     the operating system.  When `-m88110' is specified,
     `-muse-div-instruction' is ignored, and the div instruction is used
     for signed integer division.

     Note that the result of dividing INT_MIN by -1 is undefined.  In
     particular, the behavior of such a division with and without
     `-muse-div-instruction'  may differ.

`-mtrap-large-shift'
`-mhandle-large-shift'
     Include code to detect bit-shifts of more than 31 bits;
     respectively, trap such shifts or emit code to handle them
     properly.  By default GNU Pascal makes no special provision for
     large bit shifts.

`-mwarn-passed-structs'
     Warn when a function passes a struct as an argument or result.
     Structure-passing conventions have changed during the evolution of
     the C language, and are often the source of portability problems.
     By default, GNU Pascal issues no such warning.


File: gpc.info,  Node: RS/6000 and PowerPC Options,  Next: RT Options,  Prev: M88K Options,  Up: Submodel Options

IBM RS/6000 and PowerPC Options
-------------------------------

   These `-m' options are defined for the IBM RS/6000 and PowerPC:
`-mpower'
`-mno-power'
`-mpower2'
`-mno-power2'
`-mpowerpc'
`-mno-powerpc'
`-mpowerpc-gpopt'
`-mno-powerpc-gpopt'
`-mpowerpc-gfxopt'
`-mno-powerpc-gfxopt'
     GNU Pascal supports two related instruction set architectures for
     the RS/6000 and PowerPC.  The "POWER" instruction set are those
     instructions supported by the `rios' chip set used in the original
     RS/6000 systems and the "PowerPC" instruction set is the
     architecture of the Motorola MPC6xx microprocessors.  The PowerPC
     architecture defines 64-bit instructions, but they are not
     supported by any current processors.

     Neither architecture is a subset of the other.  However there is a
     large common subset of instructions supported by both.  An MQ
     register is included in processors supporting the POWER
     architecture.

     You use these options to specify which instructions are available
     on the processor you are using.  The default value of these
     options is determined when configuring GNU Pascal.  Specifying the
     `-mcpu=CPU_TYPE' overrides the specification of these options.  We
     recommend you use that option rather than these.

     The `-mpower' option allows GNU Pascal to generate instructions
     that are found only in the POWER architecture and to use the MQ
     register.  Specifying `-mpower2' implies `-power' and also allows
     GNU Pascal to generate instructions that are present in the POWER2
     architecture but not the original POWER architecture.

     The `-mpowerpc' option allows GNU Pascal to generate instructions
     that are found only in the 32-bit subset of the PowerPC
     architecture.  Specifying `-mpowerpc-gpopt' implies `-mpowerpc'
     and also allows GNU Pascal to use the optional PowerPC
     architecture instructions in the General Purpose group, including
     floating-point square root.  Specifying `-mpowerpc-gfxopt' implies
     `-mpowerpc' and also allows GNU Pascal to use the optional PowerPC
     architecture instructions in the Graphics group, including
     floating-point select.

     If you specify both `-mno-power' and `-mno-powerpc', GNU Pascal
     will use only the instructions in the common subset of both
     architectures plus some special AIX common-mode calls, and will
     not use the MQ register.  Specifying both `-mpower' and `-mpowerpc'
     permits GNU Pascal to use any instruction from either architecture
     and to allow use of the MQ register; specify this for the Motorola
     MPC601.

`-mnew-mnemonics'
`-mold-mnemonics'
     Select which mnemonics to use in the generated assembler code.
     `-mnew-mnemonics' requests output that uses the assembler mnemonics
     defined for the PowerPC architecture, while `-mold-mnemonics'
     requests the assembler mnemonics defined for the POWER
     architecture.  Instructions defined in only one architecture have
     only one mnemonic; GNU Pascal uses that mnemonic irrespective of
     which of these options is specified.

     PowerPC assemblers support both the old and new mnemonics, as will
     later POWER assemblers.  Current POWER assemblers only support the
     old mnemonics.  Specify `-mnew-mnemonics' if you have an assembler
     that supports them, otherwise specify `-mold-mnemonics'.

     The default value of these options depends on how GNU Pascal was
     configured.  Specifying `-mcpu=CPU_TYPE' sometimes overrides the
     value of these option.  Unless you are building a cross-compiler,
     you should normally not specify either `-mnew-mnemonics' or
     `-mold-mnemonics', but should instead accept the default.

`-mcpu=CPU_TYPE'
     Set architecture type, register usage, choice of mnemonics, and
     instruction scheduling parameters for machine type CPU_TYPE.  By
     default, CPU_TYPE is the target system defined when GNU Pascal was
     configured.  Supported values for CPU_TYPE are `rios1', `rios2',
     `rsc', `601', `603', `604', `power', `powerpc', `403', and
     `common'.  `-mcpu=power' and `-mcpu=powerpc' specify generic POWER
     and pure PowerPC (i.e., not MPC601) architecture machine types,
     with an appropriate, generic processor model assumed for
     scheduling purposes.

     Specifying `-mcpu=rios1', `-mcpu=rios2', `-mcpu=rsc', or
     `-mcpu=power' enables the `-mpower' option and disables the
     `-mpowerpc' option; `-mcpu=601' enables both the `-mpower' and
     `-mpowerpc' options; `-mcpu=603', `-mcpu=604', `-mcpu=403', and
     `-mcpu=powerpc' enable the `-mpowerpc' option and disable the
     `-mpower' option; `-mcpu=common' disables both the `-mpower' and
     `-mpowerpc' options.

     To generate code that will operate on all members of the RS/6000
     and PowerPC families, specify `-mcpu=common'.  In that case, GNU
     Pascal will use only the instructions in the common subset of both
     architectures plus some special AIX common-mode calls, and will
     not use the MQ register.  GNU Pascal assumes a generic processor
     model for scheduling purposes.

     Specifying `-mcpu=rios1', `-mcpu=rios2', `-mcpu=rsc', or
     `-mcpu=power' also disables the `new-mnemonics' option.
     Specifying `-mcpu=601', `-mcpu=603', `-mcpu=604', `403', or
     `-mcpu=powerpc' also enables the `new-mnemonics' option.

`-mfull-toc'
`-mno-fp-in-toc'
`-mno-sum-in-toc'
`-mminimal-toc'
     Modify generation of the TOC (Table Of Contents), which is created
     for every executable file.  The `-mfull-toc' option is selected by
     default.  In that case, GNU Pascal will allocate at least one TOC
     entry for each unique non-automatic variable reference in your
     program.  GNU Pascal will also place floating-point constants in
     the TOC.  However, only 16,384 entries are available in the TOC.

     If you receive a linker error message that saying you have
     overflowed the available TOC space, you can reduce the amount of
     TOC space used with the `-mno-fp-in-toc' and `-mno-sum-in-toc'
     options.  `-mno-fp-in-toc' prevents GNU Pascal from putting
     floating-point constants in the TOC and `-mno-sum-in-toc' forces
     GNU Pascal to generate code to calculate the sum of an address and
     a constant at run-time instead of putting that sum into the TOC.
     You may specify one or both of these options.  Each causes GNU
     Pascal to produce very slightly slower and larger code at the
     expense of conserving TOC space.

     If you still run out of space in the TOC even when you specify
     both of these options, specify `-mminimal-toc' instead.  This
     option causes GNU Pascal to make only one TOC entry for every
     file.  When you specify this option, GNU Pascal will produce code
     that is slower and larger but which uses extremely little TOC
     space.  You may wish to use this option only on files that contain
     less frequently executed code.

`-msoft-float'
`-mhard-float'
     Generate code that does not use (uses) the floating-point register
     set.  Software floating point emulation is provided if you use the
     `-msoft-float' option, and pass the option to GNU Pascal when
     linking.

`-mmultiple'
`-mno-multiple'
     Generate code that uses (does not use) the load multiple word
     instructions and the store multiple word instructions.  These
     instructions are generated by default on POWER systems, and not
     generated on PowerPC systems.  Do not use `-mmultiple' on little
     endian PowerPC systems, since those instructions do not work when
     the processor is in little endian mode.

`-mstring'
`-mno-string'
     Generate code that uses (does not use) the load string
     instructions and the store string word instructions to save
     multiple registers and do small block moves.  These instructions
     are generated by default on POWER systems, anod not generated on
     PowerPC systems.  Do not use `-mstring' on little endian PowerPC
     systems, since those instructions do not work when the processor
     is in little endian mode.

`-mno-bit-align'
`-mbit-align'
     On System V.4 and embedded PowerPC systems do not (do) force
     structures and unions that contain bit fields to be aligned to the
     base type of the bit field.

     For example, by default a structure containing nothing but 8
     `unsigned' bitfields of length 1 would be aligned to a 4 byte
     boundary and have a size of 4 bytes.  By using `-mno-bit-align',
     the structure would be aligned to a 1 byte boundary and be one
     byte in size.

`-mno-strict-align'
`-mstrict-align'
     On System V.4 and embedded PowerPC systems do not (do) assume that
     unaligned memory references will be handled by the system.

`-mrelocatable'
`-mno-relocatable'
     On embedded PowerPC systems generate code that allows (does not
     allow) the program to be relocated to a different address at
     runtime.

`-mno-toc'
`-mtoc'
     On System V.4 and embedded PowerPC systems do not (do) assume that
     register 2 contains a pointer to a global area pointing to the
     addresses used in the program.

`-mno-traceback'
`-mtraceback'
     On embedded PowerPC systems do not (do) generate a traceback tag
     before the start of the function.  This tag can be used by the
     debugger to identify where the start of a function is.

`-mlittle'
`-mlittle-endian'
     On System V.4 and embedded PowerPC systems compile code for the
     processor in little endian mode.  The `-mlittle-endian' option is
     the same as `-mlittle'.

`-mbig'
`-mbig-endian'
     On System V.4 and embedded PowerPC systems compile code for the
     processor in big endian mode.  The `-mbig-endian' option is the
     same as `-mbig'.

`-mcall-sysv'
     On System V.4 and embedded PowerPC systems compile code using
     calling conventions that adheres to the March 1995 draft of the
     System V Application Binary Interface, PowerPC processor
     supplement.  This is the default unless you configured GPC using
     `powerpc-*-eabiaix'.

`-mcall-aix'
     On System V.4 and embedded PowerPC systems compile code using
     calling conventions that are similar to those used on AIX.  This
     is the default if you configured GPC using `powerpc-*-eabiaix'.

`-mprototype'
`-mno-prototype'
     On System V.4 and embedded PowerPC systems assume that all calls to
     variable argument functions are properly prototyped.  Otherwise,
     the compiler must insert an instruction before every non
     prototyped call to set or clear bit 6 of the condition code
     register (CR) to indicate whether floating point values were
     passed in the floating point registers in case the function takes
     a variable arguments.  With `-mprototype', only calls to
     prototyped variable argument functions will set or clear the bit.


File: gpc.info,  Node: RT Options,  Next: MIPS Options,  Prev: RS/6000 and PowerPC Options,  Up: Submodel Options

IBM RT Options
--------------

   These `-m' options are defined for the IBM RT PC:

`-min-line-mul'
     Use an in-line code sequence for integer multiplies.  This is the
     default.

`-mcall-lib-mul'
     Call `lmul$$' for integer multiples.

`-mfull-fp-blocks'
     Generate full-size floating point data blocks, including the
     minimum amount of scratch space recommended by IBM.  This is the
     default.

`-mminimum-fp-blocks'
     Do not include extra scratch space in floating point data blocks.
     This results in smaller code, but slower execution, since scratch
     space must be allocated dynamically.

`-mfp-arg-in-fpregs'
     Use a calling sequence incompatible with the IBM calling
     convention in which floating point arguments are passed in
     floating point registers.  Note that `varargs.h' and `stdargs.h'
     will not work with floating point operands if this option is
     specified.

`-mfp-arg-in-gregs'
     Use the normal calling convention for floating point arguments.
     This is the default.

`-mhc-struct-return'
     Return structures of more than one word in memory, rather than in a
     register.  This provides compatibility with the MetaWare HighC (hc)
     compiler.  Use the option `-fpcc-struct-return' for compatibility
     with the Portable C Compiler (pcc).

`-mnohc-struct-return'
     Return some structures of more than one word in registers, when
     convenient.  This is the default.  For compatibility with the
     IBM-supplied compilers, use the option `-fpcc-struct-return' or the
     option `-mhc-struct-return'.


File: gpc.info,  Node: MIPS Options,  Next: i386 Options,  Prev: RT Options,  Up: Submodel Options

MIPS Options
------------

   These `-m' options are defined for the MIPS family of computers:

`-mcpu=CPU TYPE'
     Assume the defaults for the machine type CPU TYPE when scheduling
     instructions.  The choices for CPU TYPE are `r2000', `r3000',
     `r4000', `r4400', `r4600', and `r6000'.  While picking a specific
     CPU TYPE will schedule things appropriately for that particular
     chip, the compiler will not generate any code that does not meet
     level 1 of the MIPS ISA (instruction set architecture) without the
     `-mips2' or `-mips3' switches being used.

`-mips1'
     Issue instructions from level 1 of the MIPS ISA.  This is the
     default.  `r3000' is the default CPU TYPE at this ISA level.

`-mips2'
     Issue instructions from level 2 of the MIPS ISA (branch likely,
     square root instructions).  `r6000' is the default CPU TYPE at this
     ISA level.

`-mips3'
     Issue instructions from level 3 of the MIPS ISA (64 bit
     instructions).  `r4000' is the default CPU TYPE at this ISA level.
     This option does not change the sizes of any of the Pascal data
     types.

`-mfp32'
     Assume that 32 32-bit floating point registers are available.
     This is the default.

`-mfp64'
     Assume that 32 64-bit floating point registers are available.
     This is the default when the `-mips3' option is used.

`-mgp32'
     Assume that 32 32-bit general purpose registers are available.
     This is the default.

`-mgp64'
     Assume that 32 64-bit general purpose registers are available.
     This is the default when the `-mips3' option is used.

`-mint64'
     Types long, int, and pointer are 64 bits.  This works only if
     `-mips3' is also specified.

`-mlong64'
     Types long and pointer are 64 bits, and type int is 32 bits.  This
     works only if `-mips3' is also specified.

`-mmips-as'
     Generate code for the MIPS assembler, and invoke `mips-tfile' to
     add normal debug information.  This is the default for all
     platforms except for the OSF/1 reference platform, using the
     OSF/rose object format.  If the either of the `-gstabs' or
     `-gstabs+' switches are used, the `mips-tfile' program will
     encapsulate the stabs within MIPS ECOFF.

`-mgas'
     Generate code for the GNU assembler.  This is the default on the
     OSF/1 reference platform, using the OSF/rose object format.

`-mrnames'
`-mno-rnames'
     The `-mrnames' switch says to output code using the MIPS software
     names for the registers, instead of the hardware names (ie, A0
     instead of $4).  The only known assembler that supports this option
     is the Algorithmics assembler.

`-mgpopt'
`-mno-gpopt'
     The `-mgpopt' switch says to write all of the data declarations
     before the instructions in the text section, this allows the MIPS
     assembler to generate one word memory references instead of using
     two words for short global or static data items.  This is on by
     default if optimization is selected.

`-mstats'
`-mno-stats'
     For each non-inline function processed, the `-mstats' switch
     causes the compiler to emit one line to the standard error file to
     print statistics about the program (number of registers saved,
     stack size, etc.).

`-mmemcpy'
`-mno-memcpy'
     The `-mmemcpy' switch makes all block moves call the appropriate
     string function (`memcpy' or `bcopy') instead of possibly
     generating inline code.

`-mmips-tfile'
`-mno-mips-tfile'
     The `-mno-mips-tfile' switch causes the compiler not postprocess
     the object file with the `mips-tfile' program, after the MIPS
     assembler has generated it to add debug support.  If `mips-tfile'
     is not run, then no local variables will be available to the
     debugger.  In addition, `stage2' and `stage3' objects will have
     the temporary file names passed to the assembler embedded in the
     object file, which means the objects will not compare the same.
     The `-mno-mips-tfile' switch should only be used when there are
     bugs in the `mips-tfile' program that prevents compilation.

`-msoft-float'
     Generate output containing library calls for floating point.
     *Warning:* the requisite libraries are not part of GNU Pascal.
     Normally the facilities of the machine's usual C compiler are
     used, but this can't be done directly in cross-compilation.  You
     must make your own arrangements to provide suitable library
     functions for cross-compilation.

`-mhard-float'
     Generate output containing floating point instructions.  This is
     the default if you use the unmodified sources.

`-mabicalls'
`-mno-abicalls'
     Emit (or do not emit) the pseudo operations `.abicalls',
     `.cpload', and `.cprestore' that some System V.4 ports use for
     position independent code.

`-mlong-calls'
`-mno-long-calls'
     Do all calls with the `JALR' instruction, which requires loading
     up a function's address into a register before the call.  You need
     to use this switch, if you call outside of the current 512
     megabyte segment to functions that are not through pointers.

`-mhalf-pic'
`-mno-half-pic'
     Put pointers to extern references into the data section and load
     them up, rather than put the references in the text section.

`-membedded-pic'
`-mno-embedded-pic'
     Generate PIC code suitable for some embedded systems.  All calls
     are made using PC relative address, and all data is addressed
     using the $gp register.  This requires GNU as and GNU ld which do
     most of the work.

`-membedded-data'
`-mno-embedded-data'
     Allocate variables to the read-only data section first if
     possible, then next in the small data section if possible,
     otherwise in data.  This gives slightly slower code than the
     default, but reduces the amount of RAM required when executing,
     and thus may be preferred for some embedded systems.

`-msingle-float'
`-mdouble-float'
     The `-msingle-float' switch tells gcc to assume that the floating
     point coprocessor only supports single precision operations, as on
     the `r4650' chip.  The `-mdouble-float' switch permits gcc to use
     double precision operations.  This is the default.

`-mmad'
`-mno-mad'
     Permit use of the `mad', `madu' and `mul' instructions, as on the
     `r4650' chip.

`-m4650'
     Turns on `-msingle-float', `-mmad', and, at least for now,
     `-mcpu=r4650'.

`-EL'
     Compile code for the processor in little endian mode.  The
     requisite libraries are assumed to exist.

`-EB'
     Compile code for the processor in big endian mode.  The requisite
     libraries are assumed to exist.

`-G NUM'
     Put global and static items less than or equal to NUM bytes into
     the small data or bss sections instead of the normal data or bss
     section.  This allows the assembler to emit one word memory
     reference instructions based on the global pointer (GP or $28),
     instead of the normal two words used.  By default, NUM is 8 when
     the MIPS assembler is used, and 0 when the GNU assembler is used.
     The `-G NUM' switch is also passed to the assembler and linker.
     All modules should be compiled with the same `-G NUM' value.

`-nocpp'
     Tell the MIPS assembler to not run it's preprocessor over user
     assembler files (with a `.s' suffix) when assembling them.

   These options are defined by the macro `TARGET_SWITCHES' in the
machine description.  The default for the options is also defined by
that macro, which enables you to change the defaults.


File: gpc.info,  Node: i386 Options,  Next: HPPA Options,  Prev: MIPS Options,  Up: Submodel Options

Intel 386 Options
-----------------

   These `-m' options are defined for the i386 family of computers:

`-m486'
`-m386'
     Control whether or not code is optimized for a 486 instead of an
     386.  Code generated for an 486 will run on a 386 and vice versa.

`-mieee-fp'
`-mno-ieee-fp'
     Control whether or not the compiler uses IEEE floating point
     comparisons.  These handle correctly the case where the result of a
     comparison is unordered.

`-msoft-float'
     Generate output containing library calls for floating point.
     *Warning:* the requisite libraries are not part of GNU Pascal.
     Normally the facilities of the machine's usual C compiler are
     used, but this can't be done directly in cross-compilation.  You
     must make your own arrangements to provide suitable library
     functions for cross-compilation.

     On machines where a function returns floating point results in the
     80387 register stack, some floating point opcodes may be emitted
     even if `-msoft-float' is used.

`-mno-fp-ret-in-387'
     Do not use the FPU registers for return values of functions.

     The usual calling convention has functions return values of types
     `float' and `double' in an FPU register, even if there is no FPU.
     The idea is that the operating system should emulate an FPU.

     The option `-mno-fp-ret-in-387' causes such values to be returned
     in ordinary CPU registers instead.

`-mno-fancy-math-387'
     Some 387 emulators do not support the `sin', `cos' and `sqrt'
     instructions for the 387.  Specify this option to avoid generating
     those instructions. This option is the default on FreeBSD.  As of
     revision 2.6.1, these instructions are not generated unless you
     also use the `-ffast-math' switch.

`-malign-double'
`-mno-align-double'
     Control whether GNU Pascal aligns `double', `long double', and
     `long long' variables on a two word boundary or a one word
     boundary.  Aligning `double' variables on a two word boundary will
     produce code that runs somewhat faster on a `Pentium' at the
     expense of more memory.

     *Warning:* if you use the `-malign-double' switch, structures
     containing the above types will be aligned differently than the
     published application binary interface specifications for the 386.

`-msvr3-shlib'
`-mno-svr3-shlib'
     Control whether GNU Pascal places uninitialized locals into `bss'
     or `data'.  `-msvr3-shlib' places these locals into `bss'.  These
     options are meaningful only on System V Release 3.

`-mno-wide-multiply'
`-mwide-multiply'
     Control whether GNU Pascal uses the `mul' and `imul' that produce
     64 bit results in `eax:edx' from 32 bit operands to do `long long'
     multiplies and 32-bit division by constants.

`-mrtd'
     Use a different function-calling convention, in which functions
     that take a fixed number of arguments return with the `ret' NUM
     instruction, which pops their arguments while returning.  This
     saves one instruction in the caller since there is no need to pop
     the arguments there.

     You can specify that an individual function is called with this
     calling sequence with the function attribute `stdcall'.  You can
     also override the `-mrtd' option by using the function attribute
     `cdecl'.

     *Warning:* this calling convention is incompatible with the one
     normally used on Unix, so you cannot use it if you need to call
     libraries compiled with the Unix compiler.

     Also, you must provide function prototypes for all functions that
     take variable numbers of arguments (including `printf'); otherwise
     incorrect code will be generated for calls to those functions.

     In addition, seriously incorrect code will result if you call a
     function with too many arguments.  (Normally, extra arguments are
     harmlessly ignored.)

`-mreg-alloc=REGS'
     Control the default allocation order of integer registers.  The
     string REGS is a series of letters specifying a register.  The
     supported letters are: `a' allocate EAX; `b' allocate EBX; `c'
     allocate ECX; `d' allocate EDX; `S' allocate ESI; `D' allocate
     EDI; `B' allocate EBP.

`-mregparm=NUM'
     Control how many registers are used to pass integer arguments.  By
     default, no registers are used to pass arguments, and at most 3
     registers can be used.  You can control this behavior for a
     specific function by using the function attribute `regparm'.

     *Warning:* if you use this switch, and NUM is nonzero, then you
     must build all modules with the same value, including any
     libraries.  This includes the system libraries and startup modules.

`-malign-loops=NUM'
     Align loops to a 2 raised to a NUM byte boundary.  If
     `-malign-loops' is not specified, the default is 2.

`-malign-jumps=NUM'
     Align instructions that are only jumped to to a 2 raised to a NUM
     byte boundary.  If `-malign-jumps' is not specified, the default is
     2 if optimizing for a 386, and 4 if optimizing for a 486.

`-malign-functions=NUM'
     Align the start of functions to a 2 raised to NUM byte boundary.
     If `-malign-jumps' is not specified, the default is 2 if optimizing
     for a 386, and 4 if optimizing for a 486.


File: gpc.info,  Node: HPPA Options,  Next: Intel 960 Options,  Prev: i386 Options,  Up: Submodel Options

HPPA Options
------------

   These `-m' options are defined for the HPPA family of computers:

`-mpa-risc-1-0'
     Generate code for a PA 1.0 processor.

`-mpa-risc-1-1'
     Generate code for a PA 1.1 processor.

`-mjump-in-delay'
     Fill delay slots of function calls with unconditional jump
     instructions by modifying the return pointer for the function call
     to be the target of the conditional jump.

`-mmillicode-long-calls'
     Generate code which assumes millicode routines can not be reached
     by the standard millicode call sequence, linker-generated
     long-calls, or linker-modified millicode calls.  In practice this
     should only be needed for dynamicly linked executables with
     extremely large SHLIB_INFO sections.

`-mdisable-fpregs'
     Prevent floating point registers from being used in any manner.
     This is necessary for compiling kernels which perform lazy context
     switching of floating point registers.  If you use this option and
     attempt to perform floating point operations, the compiler will
     abort.

`-mdisable-indexing'
     Prevent the compiler from using indexing address modes.  This
     avoids some rather obscure problems when compiling MIG generated
     code under MACH.

`-mfast-indirect-calls'
     Generate code which performs faster indirect calls.  Such code is
     suitable for kernels and for static linking.  The fast indirect
     call code will fail miserably if it's part of a dynamically linked
     executable and in the presense of nested functions.

`-mportable-runtime'
     Use the portable calling conventions proposed by HP for ELF
     systems.

`-mgas'
     Enable the use of assembler directives only GAS understands.

`-mschedule=CPU TYPE'
     Schedule code according to the constraints for the machine type
     CPU TYPE.  The choices for CPU TYPE are `700' for 7N0 machines,
     `7100' for 7N5 machines, and `7100' for 7N2 machines.  `700' is
     the default for CPU TYPE.

     Note the `7100LC' scheduling information is incomplete and using
     `7100LC' often leads to bad schedules.  For now it's probably best
     to use `7100' instead of `7100LC' for the 7N2 machines.

`-msoft-float'
     Generate output containing library calls for floating point.
     *Warning:* the requisite libraries are not available for all HPPA
     targets.  Normally the facilities of the machine's usual C
     compiler are used, but this cannot be done directly in
     cross-compilation.  You must make your own arrangements to provide
     suitable library functions for cross-compilation.  The embedded
     target `hppa1.1-*-pro' does provide software floating point
     support.

     `-msoft-float' changes the calling convention in the output file;
     therefore, it is only useful if you compile *all* of a program with
     this option.  In particular, you need to compile `libgcc.a', the
     library that comes with GNU Pascal, with `-msoft-float' in order
     for this to work.

